December 11, 2017
Comments Off on An Efficient Approach to Design a Compact Reversible Programmable Logic Array
Posted in: IEEE 2017, VLSI
An Efficient Approach to Design a Compact Reversible Programmable Logic Array Abstract: Reversibility of logic module has eminent application in low power CMOS design, quantum computing, nanotechnology and optical computing. On the other hand, configurability of PLDs (Programmable Logic Devices) reduces NRE (Nonrecurring engineering) cost and makes faster design process that offers customer a wide […]
December 11, 2017
Comments Off on A Pre-Optimization Technique to Generate Initial Reversible Circuits with Low Quantum Cost
Posted in: IEEE 2017, VLSI
A Pre-Optimization Technique to Generate Initial Reversible Circuits with Low Quantum Cost Abstract: In order to generate an initial reversible/quantum circuit to realize a given Boolean function, one of the major approaches is to find a small Exclusive-or Sum-Of-Products (ESOP) expression for the function; each product term in the ESOP expression naturally corresponds to a […]