December 11, 2017
Comments Off on Recursive Approach to the Design of a Parallel Self-Timed Adder
Posted in: IEEE 2017, VLSI
Recursive Approach to the Design of a Parallel Self-Timed Adder Abstract: This brief presents a parallel single-rail self-timed adder. It is based on a recursive formulation for performing multibit binary addition. The operation is parallel for those bits that do not need any carry chain propagation. Thus, the design attains logarithmic performance over random operand […]
December 11, 2017
Comments Off on Quantum Cost Realization of New Reversible Gates with Transformation Based Synthesis Technique
Posted in: IEEE 2017, VLSI
Quantum Cost Realization of New Reversible Gates with Transformation Based Synthesis Technique Abstract: Reversible computing appears to be promising due its applications in emerging technologies. To compute any reversible function it is necessary to build the system with reversible gates. Simplified version of transformation technique [3,5] to synthesize new reversible gates with Fredkin and Toffoli […]