Utilization-Aware Self-Tuning Design for TLC Flash Storage Devices

Utilization-Aware Self-Tuning Design for TLC Flash Storage Devices

Abstract

The high-density, low-cost triple-level-cell (TLC) flash memory has gradually dominated the flashstorage market because of the fast-growing demand for storage capacity. However, the advances of manufacturing technologies also make TLC flash memory suffer serious performance degradation compared with the low-density, high-performance single-level-cell (SLC) flash memory. To address this issue, some vendors enable blocks of TLC flash memory to work as high-performance, low-density SLC blocks. In contrast to the past research that allocates a fixed number of TLC blocks as SLC blocks to improve the device performance to a certain degree, we propose a utilization-aware self-tuning design to trade more unused storage capacity for better system performance. The introduceddesign dynamically adjusts and maximizes the number of SLC blocks according to the amount of data stored in the storage device at runtime. With the self-tuning design, a flash storage device can not only achieve high access performance but also provide enough storage capacity. The performance and capability of proposed design were evaluated by a series of experiments, and the results are very encouraging.

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