Synthesis of Balanced Quaternary Reversible Logic Circuit

Synthesis of Balanced Quaternary Reversible Logic Circuit

 Abstract:

Binary number system based digital logic design has been in use for long with phenomenal increase in circuit sizes, working with binary logic system is becoming increasingly difficult. Multi-valued logic system reduces the significant amount of design effort. Multi-valued ternary logic under GF (3) and quaternary logic under GF (4) are available in the literature, but circuit design based on these logic systems is very few. As traditional computing devices based on irreversible logic are approaching their limit in terms of heat dissipation, power and speed requirement. Reversible computing is emerging as an alternative technology. Usage of multi-valued logic for irreversible computing is also growing. Ternary and quaternary logic based reversible gate have been proposed recently. Ternary logic based design has further been enhanced using balanced logic levels. But, the same is not available for quaternary logic. In this paper, we propose balanced quaternary logic and synthesis approach, which offers significant advantages in logic design. Small circuits like adder subtractor have also been designed based on that approach. We feel that balanced logic based approach will open a new era in multivalued logic design.

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