December 11, 2017
Comments Off on A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications
Posted in: IEEE 2017, VLSI
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications Abstract: Transpose form finite-impulse response (FIR) filters are inherently pipelined and support multiple constant multiplications (MCM) technique that results in significant saving of computation. However, transpose form configuration does not directly support the block processing unlike direct-form configuration. In this paper, we explore the possibility […]
December 11, 2017
Comments Off on Thermal-Aware Small-Delay Defect Testing in Integrated Circuits for Mitigating Overkil
Posted in: IEEE 2017, VLSI
Thermal-Aware Small-Delay Defect Testing in Integrated Circuits for Mitigating Overkil Abstract: At-speed testing of deep-submicrometer or nano-scale integrated circuits (ICs) consumes excessive power and creates hotspots and temperature gradient in the chip-under-test. The problem worsens for 3-D ICs, where heat dissipation across layers is more unbalanced. These hotspots in a circuit often cause severe degradation […]