December 11, 2017
Comments Off on High-Throughput Finite Field Multipliers Using Redundant Basis for FPGA and ASIC Implementations
Posted in: IEEE 2017, VLSI
High-Throughput Finite Field Multipliers Using Redundant Basis for FPGA and ASIC Implementations Abstract: Redundant basis (RB) multipliers over Galois Field ( GF(2m)) have gained huge popularity in elliptic curve cryptography (ECC) mainly because of their negligible hardware cost for squaring and modular reduction. In this paper, we have proposed a novel recursive decomposition algorithm for […]
December 11, 2017
Comments Off on Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding
Posted in: IEEE 2017, VLSI
Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding Abstract: The field of approximate computing has received significant attention from the research community in the past few years, especially in the context of various signal processing applications. Image and video compression algorithms, such as JPEG, MPEG, and so on, are particularly attractive candidates for approximate […]