A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

Abstract:

This letter proposes a novel direct bonded copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.

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