December 11, 2017
Comments Off on 5-bit 5-GSs Non interleaved Time-Based ADC in 65-nm CMOS for Radio-Astronomy Applications M
Posted in: IEEE 2017, VLSI
5-bit 5-GS/s Noninterleaved Time-Based ADC in 65-nm CMOS for Radio-Astronomy Applications M Abstract This paper presents a 5-bit noninterleaved time-based analog-to-digital converter (ADC), which operates at a 5-GS/s rate. The ADC is designed for the use in radio-astronomy telescopes, for whichtime interleaving is not acceptable. The ADC employs a dynamic, differential voltage-to-time converter, a folded-flash time-to-digital converter (TDC), and calibration circuitry. To generate reference delays, the calibration circuitry utilizes a […]
December 11, 2017
Comments Off on A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications
Posted in: IEEE 2017, VLSI
A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications Abstract: Continuous transistor scaling, coupled with the growing demand for low-voltage, low-power applications, increases the susceptibility of VLSI circuits to soft-errors, especially when exposed to extreme environmental conditions, such as those encountered by space applications. The most vulnerable of these circuits are memory arrays […]